| Subject | English | Chinese Taiwan |
| comp., MS | advanced programmable interrupt controller | 進階可程式化插斷控制器 (A programmable interrupt controller (PIC) that provides multiprocessor interrupt management. An APIC incorporates both static and dynamic symmetric interrupt distribution across all processors. It usually has more available interrupt lines than a typical PIC) |
| comp., MS | interrupt request | 插斷要求 (A signal sent by a device to get the attention of the processor when the device is ready to accept or send information) |
| comp., MS | interrupt request level | 插斷要求等級 (The hardware priority level at which a kernel-mode routine runs. The IRQL masks interrupts that have an equivalent or lower IRQL or preempts the routine for an interrupt that has a higher IRQL. In a symmetric multiprocessor computer, a routine that runs at a raised IRQL does not affect the IRQL of any other processor) |
| comp., MS | interrupt request line | 插斷要求行 (A hardware line over which a peripheral device, bus controller, other processor, or the kernel signals a request for service to the microprocessor) |
| comp., MS | interrupt service routine | 插斷服務常式 (A kernel-mode interrupt that is small, very fast pieces of assembly code that map physical interrupts onto logical interrupts. ISRs are used to provide hooks back to the kernel as well as device drivers) |
| comp., MS | nonmaskable interrupt | 非遮罩式插斷 (A hardware interrupt that bypasses and takes priority over interrupt requests generated by software and by the keyboard and other such devices. A nonmaskable interrupt cannot be overruled (masked) by another service request and is issued to the microprocessor only in disastrous circumstances, such as severe memory errors or impending power failures) |
| comp., MS | programmable interrupt controller | 可程式化插斷控制器 (A device that functions as an overall manager in an interrupt driven system) |
| comp., MS | system management interrupt | 系統管理中斷 (An interrupt generated by the host-controller-emulation hardware when a universal serial bus (USB) keyboard or mouse data is received and steered by the host controller hardware to a System Management Interrupt (SMI) or the standard host controller interrupt) |