| Subject | English | Japanese |
| comp., MS | cache-coherent NUMA | キャッシュ コヒーレント NUMA (A NUMA architecture that provides cache coherency across nodes) |
| comp., MS | NUMA architecture | NUMA アーキテクチャ (" A multiprocessor architecture that divides a system into nodes. Each node might include one or more processors, some memory, and a bus. A node's memory is "local" to its processors, and the processors can access the memory relatively quickly. Processors in one node can also access memory in different ("distant") nodes, but access time is slower.") |
| hist.fig. | Numa Haruo | 沼春雄 |
| hist.fig. | Numa Morikazu | 沼間守一 |
| hist.fig. | Numa Shouzou | 沼正三 (1926.3.19-) |