Subject | English | Serbian Latin |
comp., MS | advanced programmable interrupt controller | napredni programabilni kontrolor prekida (A programmable interrupt controller (PIC) that provides multiprocessor interrupt management. An APIC incorporates both static and dynamic symmetric interrupt distribution across all processors. It usually has more available interrupt lines than a typical PIC) |
comp. | basic interrupt | upravljanje prekidanjem programa |
IT | contingency interrupt | nepredvideni prekid |
tech. | external interrupt | signal prekida |
tech. | interrupt cord | specijalni gajtan B-telefonistkinje |
mech.eng. | interrupt cut | isprekidani rez |
law | interrupt limitation period | prekinut rok zastarevanja |
law | interrupt limitation period | suspendovati rok zastarevanja |
law | interrupt negotiations | prekinuti pregovore |
comp., MS | interrupt request | zahtev za prekid (A signal sent by a device to get the attention of the processor when the device is ready to accept or send information) |
IT | interrupt request line | linija zahteva za prekidom rada procesora |
comp., MS | interrupt request line | linija zahteva za prekid (A hardware line over which a peripheral device, bus controller, other processor, or the kernel signals a request for service to the microprocessor) |
comp., MS | interrupt service routine | rutina za opsluživanje prekida (A kernel-mode interrupt that is small, very fast pieces of assembly code that map physical interrupts onto logical interrupts. ISRs are used to provide hooks back to the kernel as well as device drivers) |
law | interrupt one's speech | prekinuti čiji govor |
comp. | interrupt system | prekidni sistem |
comp. | interrupt system | sistem prekidanja |
law | interrupt talks | prekinuti razgovore |
law | interrupt the meeting | prekinuti sednicu |
law | interrupt the meeting | prekinuti sastanak |
tech. | multilevel interrupt | višestepeni prekid programa |
comp., MS | nonmaskable interrupt | signal prekida koji se ne može maskirati (A hardware interrupt that bypasses and takes priority over interrupt requests generated by software and by the keyboard and other such devices. A nonmaskable interrupt cannot be overruled (masked) by another service request and is issued to the microprocessor only in disastrous circumstances, such as severe memory errors or impending power failures) |
tech. | operator external interrupt processor | procesor sa spoljašnjim prekidanjem operatora |
tech. | priority interrupt | prekidanje prema prioritetu |
comp., MS | programmable interrupt controller | programabilni kontrolor prekida (A device that functions as an overall manager in an interrupt driven system) |
tech. | reverse interrupt | prisilni prekid |