pulse inhibit adder telecom.

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In the pulse inhibit adder [12] on the AF stage, the level of the envelope curve signal can be reduced to the point that the comparators no longer switch and thus PDM pulses are not passed to the amplifier modules.
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Pulse Blocking [13] and Pulse Inhibit Adder [12]: By applying a dc offset at the input of amplifier N 39/B [12] the envelope signal Uin fed to comparators N 37, N 40 can be shifted in the negative voltage range so that the comparators no longer switch and no PDM pulses are passed to the downstream assemblies. Blocking or releasing the PDM pulses takes place through pin 6 of X 15 (release is by 0 V at X 15/6). The amplifier N 9/C,V 27 [13] provides for fast pulse blocking and relatively slow pulse release. When the transmitter is switched on it is therefore possible to release the pulses for all power modules simultaneously, and in case of a fault, to inhibit the pulses simultaneously.

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